Semi-Conductor Laboratory (SCL) in Mohali, Punjab. (Photo | SCL Website)
India

Semi-conductor laboratory in Punjab's Mohali tapes out 175 student-made chips

Meanwhile, 79 other chip designs created by Indian students have been taped out at overseas foundries.

Harpreet Bajwa

CHANDIGARH: The Semi-Conductor Laboratory (SCL) in Mohali, Punjab, has successfully taped out 175 student-designed chip layouts at its 180 nm technology node.

Meanwhile, 79 other chip designs created by Indian students have been taped out at overseas foundries. These form part of a total of 254 student-designed chip layouts. More than 68,000 students have also been trained in chip design, the Union government informed Parliament.

In addition, 25 chip designs developed by Indian startups and micro, small and medium enterprises (MSMEs) have been successfully taped out across multiple foundries, including at the advanced 12 nm technology node at the Taiwan Semiconductor Manufacturing Company (TSMC).

Sharing this information in the Lok Sabha in response to a question by Congress MP Manish Tewari from Chandigarh, Minister of State for Electronics and IT Jitin Prasad said, "As per industry estimates, India accounts for about 20 per cent of the world's semiconductor design engineers, with more than 1.25 lakh semiconductor design engineers working in the country. India also hosts about 7 per cent of the world's semiconductor Global Capability Centres (GCCs), reflecting its growing importance in the global semiconductor design ecosystem."

He stated that to make India a global hub for semiconductor chip design, the government had accorded high priority to workforce capacity building and indigenous chip design through two complementary initiatives -- the Chips to Startup (C2S) Programme, which focuses on developing industry-ready talent and strengthening academic research capabilities, and the Design Linked Incentive (DLI) Scheme, which supports startups and MSMEs in the chip design sector.

"The C2S Programme resulted in the training of over 68,000 students, and the successful tape-out of 254 chip designs by students including 175 designs at the 180 nm technology node at SCL, Mohali, and 79 designs at overseas foundries. While the DLI Scheme resulted in 24 projects from startups/ MSMEs have been approved during the period from mid-2023 to 2025 for financial support to develop semiconductor chips," he added.

The reply further stated, "The approved projects address critical sectors such as video surveillance, drone detection, energy metering, microprocessors, satellite communications, Light Emitting Diode (LED) drivers, broadband, and Internet of Things (IoT) System-on-Chips (SoCs)."

Parliament was also informed that the beneficiary companies have collectively attracted venture capital (VC) investment amounting to more than four times the financial assistance disbursed under the DLI Scheme, reflecting strong confidence from industry and investors in the technological capabilities and commercial potential of these companies.

Prasad said these 25 chips have been taped out under the government's Design Linked Incentive Scheme, which seeks to support startups and MSMEs in the chip design sector. "So far, 25 chip designs have been successfully taped out across multiple foundries, including at advanced technology nodes such as 12 nm at TSMC. Some of these designs have subsequently progressed to customer evaluation and qualification stages. Semiconductor chip design, unlike software product development, involves a highly complex, capital-intensive and multi-stage engineering process that follows a globally established product development lifecycle," he said.

The reply stated that before a semiconductor product reaches commercial deployment, it typically progresses, inter alia, through the following stages over a period that may extend up to five years or more, depending on the complexity of the chip: architecture definition, RTL design and verification, physical design, timing closure, tape-out and first-silicon fabrication, post-silicon validation, characterization and subsequent fabrication iterations, certification, qualification, benchmarking, and user acceptance.

It added that the successful tape-out of 25 chip designs across multiple foundries, including at advanced technology nodes, together with the mobilisation of venture capital investment exceeding four times the government's financial assistance disbursed, demonstrates steady progress of DLI beneficiary companies towards commercialisation.

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